Concept — Non-Linear Capacitance Extraction

A method to back out continuous non-linear capacitances C_gs(V), C_gd(V_DS), C_ds(V_DS) from datasheet measurements, for large-signal switching simulation.

Motivation

Datasheet C_iss, C_oss, C_rss are V_GS=0V small-signal AC measurements, distorted in the low V_DS region (C_gd spikes 10–100× and goes unmeasured). Using them directly in DPT simulation underestimates switching loss and the dv/dt transition.

Measurement Relations (small-signal)

$C_{iss}=C_{gs}+C_{gd}$
$C_{oss}=C_{ds}+C_{gd}$
$C_{rss}=C_{gd}(\text{Miller capacitance})$

Three-Step Extraction (see 2026-joe-nonlinear-capacitance-power-fet)

1. C_gs and V_plat: $C_{gs}\approx C_{iss}-C_{rss}$ (nearly constant); $V_{plat}=Q_{GS}/C_{gs}$ (must lie between $V_{GS(th)}$ and $V_{drive}$).
2. C_gd(V_DS): in the high-voltage region $C_{gd,high}=C_{rss}$; in the low-voltage region $C_{gd,low}$ is back-solved from the overdrive-region charge; continuous via Lorentzian/smooth-step, with $V_{trans,gd}$ set by the $Q_{GD}$ integral: $C_{gd}(V_{DS})=C_{rss}+\frac{C_{gd,low}-C_{rss}}{1+{\left(\frac{V_{DS}}{V_{trans,gd}}\right)}^2}$
3. C_ds(V_DS) (GaN): sigmoidal/Hill — $C_{ds}(V_{DS})=C_{metal}+\frac{C_{2DEG}}{1+(V_{DS}/V_{trans}{)}^k}$, $k\approx 2.5$.

Why Charge Rather Than AC

$Q=\int C(v)dv$, integrating continuously over the entire trajectory, is not limited by instrumentation at low bias and can capture peaks and the knee voltage. See charge-conservation-qv.

Related

• miller-plateau, zvs-dead-time
• power-mosfet, gan-hemt
• power-semiconductor-modeling